1. Field of the Invention
This invention relates to an improved method and system for testing multiple intellectual property cores contained within an integrated circuit, each core including a standard IEEE-1149.1 compliant test access port (TAP). A core is a predefined subcircuit function, which can be incorporated into the design of an integrated circuit. Some example core functions include but are not limited to: digital signal processors, microcontrollers, microprocessors, and memories. The present invention achieves the above mentioned testing without having to change or modify the standard TAPs of each core. Using the present invention, the TAPs of each core are made selectable such that they can be connected to the integrated circuit pins to enable direct communication between the integrated circuit pins and selected core TAPs.